IEICE transactions on communications

• 

  Año 1998, Vol. 81, Número 2

  • Architectural Choices in Large Scale ATM Switches

    J. Turner, N. Yamanaka

    págs. 120-137

    

  • Requirements on ATM Switch Architectures for Quality-of-Service Guarantees

    Masayuki Murata

    págs. 138-151

    

  • Issues in ATM Network Service Development, Standardization and Deployment

    H. Ohnishi, K. Miyake

    págs. 152-163

    

  • A High Speed Factorial Style Memory Switch Architecture

    L. T. Lee, P. H. Huang

    págs. 164-174

    

  • Input and Output Queueing Nonblocking Switch with Feed-Back Loop

    J. Choi, S. Shiokawa, I. Sasase

    págs. 175-181

    

  • Bodhi: A Highly Modular Terabit ATM Switch Fabric Architecture

    J. P. Agrawal, F. T. Yap

    págs. 182-193

    

  • Input and Output Queueing Two Stage ATM Switch with Hot-Spot Route

    S. Shiokawa, I. Sasase

    págs. 194-200

    

  • ATM Based Broadband Access System Using Bearer Connection Control

    H. Ueda, H. Kasahara, S. Chaki, H. Sato

    págs. 201-208

    

  • The Next-Generation ATM Switching Architecture for Multimedia Communications

    Z. Yashiro, T. Tanaka, Y. Doi

    págs. 209-214

    

  • A High-Speed Tandem-Crosspoint ATM Switch Architecture with Input and Output Buffers

    E. Oki, N. Yamanaka

    págs. 215-223

    

  • Design and Evaluation of Scalable Shared-Memory ATM Switches

    M. Alimuddin, H. M. Alnuweiri

    págs. 224-236

    

  • Implementation of Fast ATM Protection Switching Function on ATM Nodes

    T. Kozaki, A. Takase, K. Sakamoto, M. Miyagi, M. Takatori

    págs. 237-243

    

  • The Odd-Even ATM Switch

    C. Kolias, L. Kleinrock

    págs. 244-250

    

  • Architecture of a Multigigabit ATM Core Switch for the B-ISDN

    E. P. Rathgeb

    págs. 251-257

    

  • Multicast Packet Switch Based on Dilated Network

    P. U. Tagle, N. K. Sharma

    págs. 258-265

    

  • Clos-Knockout: A Large-Scale Modular Multicast ATM Switch

    K. T. Ko, E. W. M. Wong, K. S. Chan, S. Chan, K. L. Yeung

    págs. 266-275

    

  • An Efficient Architecture for Multicasting in Shared Buffer ATM Switches

    Y. S. Lin, C. B. Shung

    págs. 276-283

    

  • A High-Performance Multicast Switch and Its Feasibility Study

    S. Yasuda, S. Urushidani, S. Hino, Y. Ohtomo

    págs. 284-296

    

  • Design of a New Multicast Addressing Scheme for Self-Routing ATM Tree Networks

    J. S. Choi, K. S. Lee, S. H. Sohn

    págs. 297-299

    

  • Design and Analysis of a Growable ATM Switch with Multicasting Capability

    J. S. Choi

    págs. 300-306

    

  • Simulation & Measurement of TCP/IP over ATM Wide Area Networks

    D. Niehaus, G. Y. Lazarou, V. S. Frost, J. B. Evans

    págs. 307-314

    

  • A Highly Reliable Frame-Relay Switching Node Architecture Based on ATM Switching Technology

    K. Noguchi, Y. Kawashima, S. Narita

    págs. 315-323

    

  • Scalable Internet Backbone Using Multi-Gigabit ATM-Based Connectionless Switching

    N. Watanabe, S. Ushijima, H. Ichikawa, K. Noritake

    págs. 324-332

    

  • Voice Message Connection Control for PSTN and N-ISDN Subscribers in ATM Switching System

    H. Park, S. B. Hong, Y. K. Lee

    págs. 333-339

    

  • Voice Communication on Multimedia ATM Network Using Shared VCI Cell

    N. Yamai, K. I. Murakami, T. Masaki, Y. Nakatani, T. Onoye

    págs. 340-346

    

  • Implementation of an ATM-SLIC for VTOA in a Trial ATM Switching System

    H. Iwata, H. Yamada

    págs. 347-353

    

  • Maximum Throughput Analysis of a Datagram Switch for Broadband Networks

    P. Giacomazzi

    págs. 354-362

    

  • Realization of Earliest-Due-Date Scheduling Discipline for ATM Switches

    S. T. Liang, M. C. Yuang

    págs. 363-372

    

  • Performance Analysis of Per-VC Cell Scheduling

    S. Archambault, J. Yan

    págs. 373-379

    

  • An Age Priority Packet Discarding Scheme for ATM Switches on Internet Backbone

    H. B. Chiou, Z. Tsai

    págs. 380-391