IEICE transactions on fundamentals of electronics, communications and computer

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  Año 2008, Vol. 91, Número 12

  • Highly Efficient Comparator Design Automation for TIQ Flash A/D Converter

    In Young Kim

    págs. 3415-3422

    

  • A Power Grid Optimization Algorithm by Observing Timing Error Risk by IR Drop

    Y. Kawakami

    págs. 3423-3430

    

  • Efficient Hybrid Grid Synthesis Method Based on Genetic Algorithm for Power/Ground Network Optimization with Dynamic Signal Consideration

    Y. Yan, S. Kimura

    págs. 3431-3442

    

  • Early Stage Power Supply Planning: A Heuristic Method for Codesign of Power/Ground Network and Floorplan

    Xiaoqui Wang

    págs. 3443-3450

    

  • Character Projection Mask Set Optimization for Enhancing Throughput of MCC Projection Systems

    Makoto Sugihara, Yusuke Matsunaga, Kazuaki Murakami

    págs. 3451-3460

    

  • Impact of Well Edge Proximity Effect on Timing

    Toshiki Kanamoto

    págs. 3461-3464

    

  • Adaptive Stochastic Collocation Method for Parameterized Statistical Timing Analysis with Quadratic Delay Model

    Yibo Wang

    págs. 3465-3473

    

  • Analytical Eye-Diagram Model for On-Chip Distortionless Transmission Lines and Its Application to DesignSpace Explorations

    Masanori Hashimoto

    págs. 3474-3480

    

  • Clock Skew Evaluation Considering Manufacturing Variability in Mesh-Style Clock Distribution

    S. Abe, Masanori Hashimoto, Takao Onoye

    págs. 3481-3487

    

  • New Gate Models for Gate-Level Delay Calculation under Crosstalk Effects

    T. Il Bae, J. Kim, Y. Kim

    págs. 3488-3496

    

  • Timing Critically for Timing Yield Optimization

    Hee Joon Park

    págs. 3497-3505

    

  • Maximizing Stuck-Open Fault Coverage Using Stuck-at Test Vectors

    Y. Higami

    págs. 3506-3513

    

  • A Unified Test Compression Technique for Scan Stimulus and Unknown Masking Data with No Test Loss

    Youhua Shi

    págs. 3514-3523

    

  • A Parallel Method to Extract Critical Areas of Net Pairs for Diagnosing Bridge Faults

    K. Suemitsu

    págs. 3524-3530

    

  • Fine-Grained Power Gating Based on the Controlling Value of Logic Elements

    Lan Chen

    págs. 3531-3538

    

  • Optimal Time-Multiplexing in Inter-FPGA Connections for Accelerating Multi-FPGA Prototyping Systems

    Masato Inagi

    págs. 3539-3547

    

  • Advanced Assertion-Based Design for Mixed-Signal Verification

    A. Jesser

    págs. 3548-3555

    

  • High-Level Synthesis of Software Function Calls

    Masafumi Nishimura

    págs. 3556-3558

    

  • Formal Model for the Reduction of the Dynamic Energy Consumption in Multi-Layer Memory Subsystems

    Huamin Zhu

    págs. 3559-3567

    

  • Optimal Common Sub-Expression Elimination Algorithm of Multiple Constant Multiplications with a Logic Depth Constraint

    Y. Ho

    págs. 3568-3575

    

  • Way-Scaling to Reduce Power of Cache with Delay Variation

    M. Goudarzi, T. Matsumura

    págs. 3576-3584

    

  • Simultaneous Optimization of Skew and Control Step Assignments in RT-Datapath Synthesis

    T. Obata, Mineo Kaneko

    págs. 3585-3595

    

  • Evaluation of Interconnect-Complexity-Aware Low-Power VLSI Design Using Multiple Supply and Threshold Voltages

    H. Waidyasooriya, Masanori Hariyama, Michitaka Kameyama

    págs. 3596-3606

    

  • Efficient Encoding Architecture for IEEE 802.16e LDPC Codes

    J. Kim, Hyung Joun Yoo, M. Lee

    págs. 3607-3611

    

  • Autonomous Repair Fault Tolerant Dynamic Reconfigurable Device

    K. Nakahara

    págs. 3612-3621

    

  • A High Performance Partially-Parallel Irregular LDPC Decoder Based on Sum-Delta Message Passing Schedule

    W. Ji

    págs. 3622-3629

    

  • High Throughput VLSI Architecture of a Fast Mode Decision Algorithm for H.264/AVC Intra Encoding

    Taiyi Zhang

    págs. 3630-3637

    

  • Wide-Range Motion Estimation Architecture with Dual Search Windows for High Resolution Video Coding

    Lan Rong Dung, M. Lin

    págs. 3638-3650

    

  • Area-Efficient Reconfigurable Architecture for Media Processing

    Yukio Mitsuyama

    págs. 3651-3662

    

  • On Almost Perfect Nonlinear Functions

    C. Carlet

    págs. 3665-3678