IEICE transactions on information and systems

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  Año 1997, Vol. 80, Número 10

  • Embedded system cost optimization via data path width adjustment

    Barry Shackleford, Mitsuhiro Yasuda, Etsuko Okushi

    págs. 974-981

    

  • Fast scheduling and allocation algorithms for entropy CODEC

    Katsuharu Suzuki, Nozomu Togawa, Masao Sato

    págs. 982-992

    

  • An iterative improvement method for state minimization of incompletely specified finite state machines

    Hiroyuki Higuchi, Yusuke Matsunaga

    págs. 993-1000

    

  • Minimization of AND-OR-EXOR three-level networks with AND gate sharing

    Debatosh Debnath, Tsutomu Sasao

    págs. 1001-1008

    

  • Generating random benchmark circuits with restricted fan-ins

    Kazuo Iwama, Kensuke Hino, Hiroyuki Kurokawa

    págs. 1009-1016

    

  • Logic synthesis for look-up table based FPGAs using functional decomposition and boolean resubstitution

    Hiroshi Sawada, Takayuki Suyama, Akira Nogoya

    págs. 1017-1023

    

  • Estimating interconnection lengths in three-dimensional computer systems

    Dirk Stroobandt, Jan Van Campenhout

    págs. 1024-1031

    

  • Non-deterministic constraint generation for analog and mixed-signal layout

    Edoardo Charbon, Enrico Malavasi, Paolo Miliozzi

    págs. 1032-1043