Cache memory for a LISP machine

• Autores: R. Q. Feitosa, G. F Guidacci da Silveira
• Localización: Panel '92: actas, XVIII Conferencia Latinoamericana de Informática, 1992, págs. 433-442
• Idioma: inglés
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• Resumen

  • This work is part of a research to find out the appropriate cache strategies for LISP oriented architectures. A virtual LISP machine, based on the SECD architecture, was developed. Trace driven simulation was the used methodology to evaluate different cache structures. This paper analyses how three aspects of the SECD architecture affect the cache performance: free list organization, the allocation of the cons cells and garbage collection. The simulation results show that linear free list and a unique contiguous vector of cons cell enforce access locality. The garbage collection does not have a cumulative effect over the cache miss ratio. The analysis is based only on traces that do not contain intervening garbage collections. The cache miss ratio for a given test program varies within a limited range, as a result of successive garbage collections.