A novel truncation spurs free structure of direct digital synthesizer

• Yuanwang Yang ^[1] ; Jingye Cai ^[1] ; Jose Schutt-Aine ^[2]
  1. [1] University of Electronic and Scientific Technology of China
  2. [2] University of Illinois at Urbana and Champaign
• Localización: Compel: International journal for computation and mathematics in electrical and electronic engineering, ISSN 0332-1649, Vol. 32, Nº 2 (Special Issue: CAC 2010), 2013, págs. 454-466
• Idioma: inglés
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• Resumen

  • Purpose – Spurious frequencies (spurs) resulting from phase truncation are one of the main signal integrity issues for direct digital synthesizers (DDS). The standard approach in DDS design consists of truncating the phase word output from the phase accumulator, in order to minimize the size of the lookup table. This process generates spurs and degrades the quality of signals at the output of a DDS. In principle, since the bit width of the digital‐to‐analog converter (DAC) is narrower than that of the lookup table, the latter can be compressed without using phase truncation. The purpose of this paper is to propose a novel spur‐free truncation method for compressing the sine lookup table in a DDS structure.

    Design/methodology/approach – In this paper, a novel spur‐free truncation method for compressing the sine lookup table in a DDS structure is proposed. First, the paper discusses the origins of spurs in direct digital synthesizers; next, methods for avoiding large sine lookup tables are analyzed to help generate spur‐free outputs via truncation.

    Findings – By introducing a comparator and an adder into the traditional DDS architecture, the sine lookup table can be compressed without significant hardware change in the design. Simulation results using MATLAB and implementation results on FPGA evaluation platform show that the novel structure can eliminate the truncation spurs without increasing the size of the lookup table. Previous works on compression algorithm of lookup table are still available to the novel structure.

    Originality/value – A novel approach for the reduction in size of digital synthesizer lookup table is proposed in this work. Size reduction is achieved without producing truncation spurs. The method exploits the property that the bit width of a DAC will generally be smaller than the bit width of a phase accumulator. A comparator or an adder are introduced to the traditional structure of a DDS to help achieve the size compression. Simulations in MATLAB verified that the novel structure can eliminate truncation spurs in the output signal without increasing the size of the lookup table.