Statistical assessment of the fabrication yield of multi-component logic circuits

• D. Sprevak ^[1] ; R.S. Ferguson ^[1]
  1. [1] Queen's University

     Queen's University

     Canadá

     
• Localización: Compel: International journal for computation and mathematics in electrical and electronic engineering, ISSN 0332-1649, Vol. 3, Nº 4, 1984, págs. 217-224
• Idioma: inglés
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• Resumen

  • A statistical model is used as the basis of a rapid, simple and precise method of predicting the fabrication yield of multi‐component logic circuits. The method is based on the statistical behaviour of the individual circuit components.