Main degradation mechanism in AsTeGeSiN threshold switching devices
- Autores: Hyun-Sik Choi
- Localización: Microelectronics reliability, ISSN 0026-2714, Nº. 56, 2016, págs. 61-65
- Idioma: inglés
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Resumen
AbstracAsTeGeSiN threshold switching devices which have recently been reported as reliable selectors in 3D memories are investigated in terms of the main degradation mechanism. The trap-limited conduction mechanism is also applicable to AsTeGeSiN threshold switching devices. This is verified by the conduction currents at various temperatures. Using the trap-limited conduction mechanism, it is revealed that the trap generations primarily occur during pulse cycling measurements. This is also verified using low-frequency noise measurements. The increased trap densities are directly related to low-frequency noise densities. Also, the speed of the current degradation is estimated using the number of pulse cycles. An increase in the current level by pulse cycles is harmful to the read margin of a selector in 3D memories. Because of this effect, the block size of the 3D memory architecture is limited by suitable reading operation. For example, the maximum block size after 104 pulse cycles is reduced by almost 1/4 times than that before giving the pulse cycles for reliable operation. This degradation is a limiting factor for high-density 3D memories with AsTeGeSiN threshold switching devices as a selector. ©2015 Elsevier Science Ltd. All rights reserved.
