Un compilador de buffers para diseños optimizados

• Autores: D. Navarro, A. Roy
• Localización: Diseño de circuitos integrados: actas del VI Congreso. Santander, 11/15 de noviembre de 1991, 1991, ISBN 84-87412-61-0, págs. 367-374
• Idioma: español
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• Resumen

  • This paper deals with the theory and implementation of a module generator for CMOS buffers. The generator, written in C, outputs design and layout of globally optimal buffers. Analytical models for design objetives are presented, and novel algorithms are discussed. Different techniques has been combined to solve the circuit optimization problem with very low computational costs. Results show that usual solutions with constant tapering factor and constant P/N width ratio are never optimal.

    The paper concentrates mainly on global optimization of transistor sizes. Variations of process, design and layout parameters with respect to each objetive function are studied in detail.