Experiences with life-cycle aware computer architecture

• Autores: John Oliver, Roland Geyer, Alan Savage, Frederic T. Chong, Rajeevan Amirtharajah, Venkatesh Akella
• Localización: The International journal of engineering education, ISSN-e 0949-149X, Vol. 26, no. Extra 2, 2010, págs. 297-304
• Idioma: inglés
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• Resumen

  • The dark side of Moore’s Law is our society’s insatiable need to constantly upgrade our computing devices. As a result, the typicalprocessor is only used for a fraction of it’s expected lifetime, despite the immense cost to produce a processor. While the rapid advanceof technology makes silicon obsolete in a few years, we propose that chips should be reused for less demanding computing tasks. Thisre-use strategy creates a food chain of computing devices which amortizes the energy required to build processors over severalcomputing generations.This paper is structured into two parts. First, we describe a proposed a processor re-use strategy, showing that processor re-usemakes sense for low-power, embedded processors. These re-usable processors occupy a design space that requires us to implementflexible and reliable processors. The second part of this paper describes student efforts centered around re-usable processors atCalifornia Polytechnic State University, San Luis Obispo as well as the University of California, Santa Barbara.