Abstract The starting point for describing the electrostatic operation of any semiconductor device begins with a band diagram illustrating changes in the semiconductor Fermi level and the alignment of the valence and conduction bands with other interfacing semiconductors, insulating dielectrics and metal contacts. Such diagrams are essential for understanding the behavior and reliability of any semiconductor device. For metal interconnects, the band alignment between the metal conductor and the insulating intermetal and interlayer dielectric (ILD) is equally important. However, relatively few investigations have been made. In this regard, we have investigated the band alignment at the most common interfaces present in traditional single and dual damascene low-k/Cu interconnect structures. We specifically report combined X-ray photoelectron spectroscopy and reflection electron energy loss spectroscopy (REELS) measurements of the Schottky barrier present at the ILD and dielectric Cu capping layer (CCL) interfaces with the Ta(N) via/trench Cu diffusion barrier. We also report similar measurements of the valence and conduction band offsets present at the interface between a-SiN(C):H dielectric CCLs and low-k a-SiOC:H ILDs (porous and non-porous). The combined results point to metal interfaces with the CCL having the lowest interfacial barrier for electron transport. As trap and defect states in low-k dielectrics are also important to understanding low-k/Cu interconnect reliability, we additionally present combined electron paramagnetic resonance (EPR) and electrically detected magnetic resonance (EDMR) measurements to determine the chemical identity and energy level of some electrically active trap/defect states in low-k dielectrics. Combined with the photoemission derived band diagrams, the EPR/EDMR measurements point to mid-gap carbon and silicon dangling bond defects in the low-k ILD and CCL, respectively, playing a role in electronic transport in these materials. We show that in many cases the combined band and defect state diagrams can explain and predict some of the observed reliability issues reported for low-k/Cu interconnects.
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